H265 DECODER IIP

H265 Decoder core is compliant with standard ISO/IEC 23008-2/ITU-T H.265 specification. Through its compatibility, it provides a simple interface to a wide range of low-cost devices.H265 Decoder is proven in FPGA environment. The host interface of the H265 can be simple interface or can be AHB, AHB-Lite, APB, AXI, AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or custom buses.

H265 DECODER IIP IIP is supported natively in Verilog and VHDL

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  • Supports ISO/IEC 23008-/ITU-T H.265 specification.
  • Supports full H.265/HEVC Decoder functionality.
  • Supports profile level up to 6.2.
  • Supports resolution up to 3840x2160@60fps.
  • Supports adaptive deblocking and sample adaptive offset filters.
  • Supports CABAC entropy decoding.
  • Supports all prediction methods,
    • Inter prediction
    • Intra prediction
  • Supports 32x32, 16x16, 8x8 and 4x4 integer DCT Transform
  • Supports Chroma 4:4:4, 4:2:2 and 4:2:0
  • Supports VBR and CBR.
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Simple interface allows easy connection to microprocessor/microcontroller devices
  • Supports 8bpp,10bpp and 12bpp color modes
  • Supports input pixels at 1/2/4/8 pixel per clock
  • Supports 8,10,16,20,32 bits output bit stream
    • Single site license option is provided to companies designing in a single site.
    • Multi sites license option is provided to companies designing in multiple sites.
    • Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
    • Unlimited Designs, license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.
    • The H265 Decoder interface is available in Source and netlist products.
    • The Source product is delivered in plain text verilog. If needed VHDL,SystemC code can also be provided.
    • Easy to use Verilog Test Environment with Verilog Testcases
    • Lint, CDC, Synthesis, Simulation Scripts with waiver files
    • IP-XACT RDL generated address map
    • Firmware code and Linux driver package
    • Documentation contains User's Guide and Release notes.