HDCP 1.x Transmitter core is compliant with standard HDCP specification as 1.3 and 1.4. Through its compatibility, it provides a simple interface to a wide range of low-cost devices. HDCP 1.x Transmitter IIP is proven in FPGA environment. The Transmitter interface of the HDCP can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.
HDCP 1.x Transmitter IIP IIP is supported natively in Verilog and VHDL
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