Serial Flash Controller IIP

SERIAL_FLASH CONTROLLER interface provides full support for the two-wire SERIAL FLASH CONTROLLER synchronous serial interface,compatible with SERIAL FLASH specification. Through its SERIAL FLASH CONTROLLER compatibility, it provides a simple interface to a wide range of low-cost devices. SERIAL FLASH CONTROLLER IIP is proven in FPGA environment.The host interface of the SERIAL FLASH CONTROLLER can be AMBA APB, AMBA AHB, AMBA AHB-Lite, AMBA AXI, AMBA AXI-Lite, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.

Serial Flash Controller IIP IIP is supported natively in Verilog and VHDL

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  • Compliant with SPI Spansion DDR Flash model (S25FL512S).
  • Full SPI Master Functionality.
  • Supports Single, Dual and QUAD SPI modes.
  • Programmable Command Sequence.
  • Data Transfer – Programmed IO Mode [PIO].
  • Supports Mode0 and Mode3.
  • Programmable CPOL, CPHA.
  • Supports up to 4 Devices.
  • Individually Controllable pins to drive chip-select, write protect and hold signal.
  • Thresholds to generate interrupt.
  • Control and Status Registers to configure the modules.
  • Configurable Transmit/Receive Data FIFO.
  • Software and Hardware Reset.
  • Extended Address for Access to higher memory density.
  • DDR (Double Data Rate) support.
  • Advanced Sector Protection.
  • Direct Memory Access (DMA) support.
  • Boot Support after power on reset.
  • AHB Slave Interface for Register Programming and PIO data Transfer.
  • AHB Master Interface for DMA and Boot Data Transfer.
  • Fully synthesizable.
  • Static synchronous design.
  • Scan test ready.
  • Simple interface allows easy connection to microprocessor/microcontroller devices.
    • Single Site license option is provided to companies designing in a single site.
    • Multi Sites license option is provided to companies designing in multiple sites.
    • Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
    • Unlimited Designs,license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.
    • The SERIAL FLASH CONTROLLER interface is available in Source and netlist products.
    • The Source product is delivered in verilog. If needed VHDL, SystemC code can also be provided.
    • Easy to use Verilog Test Environment with Verilog Testcases
    • Lint, CDC, Synthesis, Simulation Scripts with waiver files
    • IP-XACT RDL generated address map
    • Firmware code and Linux driver package
    • Documentation contains User's Guide and Release notes.